For sale is the Glitch Works Altair 680 Universal 64K RAM board. This board is a from-scratch new design for the MITS Altair 680 computer, designed and tested with the help of several members of the Altair Computer Club. It has been designed and tested to support front panel operation with the Altair 680, which requires extra circuitry due to the way in which the front panel operates. This board is also compatible with RAMtron/Cypress FM18W08 ferroelectric RAM (FeRAM), a nonvolatile "core on silicon" device.

Circuit boards are high-quality FR4 material, with leaded solder HASL surface finish and true hard gold plating on the edge connector. Measurements for board outline, edge connector, and standoff hole positioning were taken from a number of vintage MITS boards and averaged out. The mechanical dimensions of this board are the same as our GW-A680-1 prototyping board.

Board features:

• Completely static, memory access qualified by PHI2
• Data latched after read for front panel compatibility
• 0-64K support in 4K segments
• Can disable first 1K of GW-A680-RAM1 memory (so you don't need to re-address 1K of RAM on motherboard)
• Supports modified PHI2 signal (highly recommended for stability)
• Includes power-on reset circuit which allows for use of NVRAM/FeRAM without losing contents on reset
• Spare 32K JEDEC footprint provided
• Unused board space as prototyping area
• Additional test points to allow use of data buffers by prototype area circuits
• Support for extra bulk filtering capacitance (not included with kit or assembled options)

We're working on a manual for this board but it is not yet available.

This project is available as a bare circuit board, board + parts kit, or fully assembled and tested. Assembled and tested boards are burned in on an original Altair 680 using Martin Eberhard's excellent memory test program.

Do note that, while the board supports a full 64K of RAM, there are special considerations for the top 8K of RAM. Enabling the 60-64K bank will conflict with the ROMs and ACIA serial port on the 680's' motherboard. Enabling the 56-60K segment will not cause conflicts, but will cause MITS BASIC to lock up since it hits the ACIA during memory sizing and stops console response. We currently recommend enabling only 0-56K for 56K of total memory.